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/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * MFD core driver for Richtek RT5033
 *
 * Copyright (C) 2014 Samsung Electronics, Co., Ltd.
 * Author: Beomho Seo <beomho.seo@samsung.com>
 */

#ifndef __RT5033_PRIVATE_H__
#define __RT5033_PRIVATE_H__

enum rt5033_reg {
	RT5033_REG_CHG_STAT		= 0x00,
	RT5033_REG_CHG_CTRL1		= 0x01,
	RT5033_REG_CHG_CTRL2		= 0x02,
	RT5033_REG_DEVICE_ID		= 0x03,
	RT5033_REG_CHG_CTRL3		= 0x04,
	RT5033_REG_CHG_CTRL4		= 0x05,
	RT5033_REG_CHG_CTRL5		= 0x06,
	RT5033_REG_RT_CTRL0		= 0x07,
	RT5033_REG_CHG_RESET		= 0x08,
	/* Reserved 0x09~0x18 */
	RT5033_REG_RT_CTRL1		= 0x19,
	/* Reserved 0x1A~0x20 */
	RT5033_REG_FLED_FUNCTION1	= 0x21,
	RT5033_REG_FLED_FUNCTION2	= 0x22,
	RT5033_REG_FLED_STROBE_CTRL1	= 0x23,
	RT5033_REG_FLED_STROBE_CTRL2	= 0x24,
	RT5033_REG_FLED_CTRL1		= 0x25,
	RT5033_REG_FLED_CTRL2		= 0x26,
	RT5033_REG_FLED_CTRL3		= 0x27,
	RT5033_REG_FLED_CTRL4		= 0x28,
	RT5033_REG_FLED_CTRL5		= 0x29,
	/* Reserved 0x2A~0x40 */
	RT5033_REG_CTRL			= 0x41,
	RT5033_REG_BUCK_CTRL		= 0x42,
	RT5033_REG_LDO_CTRL		= 0x43,
	/* Reserved 0x44~0x46 */
	RT5033_REG_MANUAL_RESET_CTRL	= 0x47,
	/* Reserved 0x48~0x5F */
	RT5033_REG_CHG_IRQ1		= 0x60,
	RT5033_REG_CHG_IRQ2		= 0x61,
	RT5033_REG_CHG_IRQ3		= 0x62,
	RT5033_REG_CHG_IRQ1_CTRL	= 0x63,
	RT5033_REG_CHG_IRQ2_CTRL	= 0x64,
	RT5033_REG_CHG_IRQ3_CTRL	= 0x65,
	RT5033_REG_LED_IRQ_STAT		= 0x66,
	RT5033_REG_LED_IRQ_CTRL		= 0x67,
	RT5033_REG_PMIC_IRQ_STAT	= 0x68,
	RT5033_REG_PMIC_IRQ_CTRL	= 0x69,
	RT5033_REG_SHDN_CTRL		= 0x6A,
	RT5033_REG_OFF_EVENT		= 0x6B,

	RT5033_REG_END,
};

/* RT5033 Charger state register */
#define RT5033_CHG_STAT_MASK		0x20
#define RT5033_CHG_STAT_DISCHARGING	0x00
#define RT5033_CHG_STAT_FULL		0x10
#define RT5033_CHG_STAT_CHARGING	0x20
#define RT5033_CHG_STAT_NOT_CHARGING	0x30
#define RT5033_CHG_STAT_TYPE_MASK	0x60
#define RT5033_CHG_STAT_TYPE_PRE	0x20
#define RT5033_CHG_STAT_TYPE_FAST	0x60

/* RT5033 CHGCTRL1 register */
#define RT5033_CHGCTRL1_IAICR_MASK	0xe0
#define RT5033_CHGCTRL1_MODE_MASK	0x01

/* RT5033 CHGCTRL2 register */
#define RT5033_CHGCTRL2_CV_MASK		0xfc

/* RT5033 CHGCTRL3 register */
#define RT5033_CHGCTRL3_CFO_EN_MASK	0x40
#define RT5033_CHGCTRL3_TIMER_MASK	0x38
#define RT5033_CHGCTRL3_TIMER_EN_MASK	0x01

/* RT5033 CHGCTRL4 register */
#define RT5033_CHGCTRL4_EOC_MASK	0x07
#define RT5033_CHGCTRL4_IPREC_MASK	0x18

/* RT5033 CHGCTRL5 register */
#define RT5033_CHGCTRL5_VPREC_MASK	0x0f
#define RT5033_CHGCTRL5_ICHG_MASK	0xf0
#define RT5033_CHGCTRL5_ICHG_SHIFT	0x04
#define RT5033_CHG_MAX_CURRENT		0x0d

/* RT5033 RT CTRL1 register */
#define RT5033_RT_CTRL1_UUG_MASK	0x02
#define RT5033_RT_HZ_MASK		0x01

/* RT5033 control register */
#define RT5033_CTRL_FCCM_BUCK_MASK		BIT(0)
#define RT5033_CTRL_BUCKOMS_MASK		BIT(1)
#define RT5033_CTRL_LDOOMS_MASK			BIT(2)
#define RT5033_CTRL_SLDOOMS_MASK		BIT(3)
#define RT5033_CTRL_EN_BUCK_MASK		BIT(4)
#define RT5033_CTRL_EN_LDO_MASK			BIT(5)
#define RT5033_CTRL_EN_SAFE_LDO_MASK		BIT(6)
#define RT5033_CTRL_LDO_SLEEP_MASK		BIT(7)

/* RT5033 BUCK control register */
#define RT5033_BUCK_CTRL_MASK			0x1f

/* RT5033 LDO control register */
#define RT5033_LDO_CTRL_MASK			0x1f

/* RT5033 charger property - model, manufacturer */

#define RT5033_CHARGER_MODEL	"RT5033WSC Charger"
#define RT5033_MANUFACTURER	"Richtek Technology Corporation"

/*
 * RT5033 charger fast-charge current lmits (as in CHGCTRL1 register),
 * AICR mode limits the input current for example,
 * the AIRC 100 mode limits the input current to 100 mA.
 */
#define RT5033_AICR_100_MODE			0x20
#define RT5033_AICR_500_MODE			0x40
#define RT5033_AICR_700_MODE			0x60
#define RT5033_AICR_900_MODE			0x80
#define RT5033_AICR_1500_MODE			0xc0
#define RT5033_AICR_2000_MODE			0xe0
#define RT5033_AICR_MODE_MASK			0xe0

/* RT5033 use internal timer need to set time */
#define RT5033_FAST_CHARGE_TIMER4		0x00
#define RT5033_FAST_CHARGE_TIMER6		0x01
#define RT5033_FAST_CHARGE_TIMER8		0x02
#define RT5033_FAST_CHARGE_TIMER9		0x03
#define RT5033_FAST_CHARGE_TIMER12		0x04
#define RT5033_FAST_CHARGE_TIMER14		0x05
#define RT5033_FAST_CHARGE_TIMER16		0x06

#define RT5033_INT_TIMER_ENABLE			0x01

/* RT5033 charger termination enable mask */
#define RT5033_TE_ENABLE_MASK			0x08

/*
 * RT5033 charger opa mode. RT50300 have two opa mode charger mode
 * and boost mode for OTG
 */

#define RT5033_CHARGER_MODE			0x00
#define RT5033_BOOST_MODE			0x01

/* RT5033 charger termination enable */
#define RT5033_TE_ENABLE			0x08

/* RT5033 charger CFO enable */
#define RT5033_CFO_ENABLE			0x40

/* RT5033 charger constant charge voltage (as in CHGCTRL2 register), uV */
#define RT5033_CHARGER_CONST_VOLTAGE_LIMIT_MIN	3650000U
#define RT5033_CHARGER_CONST_VOLTAGE_STEP_NUM   25000U
#define RT5033_CHARGER_CONST_VOLTAGE_LIMIT_MAX	4400000U

/* RT5033 charger pre-charge current limits (as in CHGCTRL4 register), uA */
#define RT5033_CHARGER_PRE_CURRENT_LIMIT_MIN	350000U
#define RT5033_CHARGER_PRE_CURRENT_STEP_NUM	100000U
#define RT5033_CHARGER_PRE_CURRENT_LIMIT_MAX	650000U

/* RT5033 charger fast-charge current (as in CHGCTRL5 register), uA */
#define RT5033_CHARGER_FAST_CURRENT_MIN		700000U
#define RT5033_CHARGER_FAST_CURRENT_STEP_NUM	100000U
#define RT5033_CHARGER_FAST_CURRENT_MAX		2000000U

/*
 * RT5033 charger const-charge end of charger current (
 * as in CHGCTRL4 register), uA
 */
#define RT5033_CHARGER_EOC_MIN			150000U
#define RT5033_CHARGER_EOC_REF			300000U
#define RT5033_CHARGER_EOC_STEP_NUM1		50000U
#define RT5033_CHARGER_EOC_STEP_NUM2		100000U
#define RT5033_CHARGER_EOC_MAX			600000U

/*
 * RT5033 charger pre-charge threshold volt limits
 * (as in CHGCTRL5 register), uV
 */

#define RT5033_CHARGER_PRE_THRESHOLD_LIMIT_MIN	2300000U
#define RT5033_CHARGER_PRE_THRESHOLD_STEP_NUM	100000U
#define RT5033_CHARGER_PRE_THRESHOLD_LIMIT_MAX	3800000U

/*
 * RT5033 charger enable UUG, If UUG enable MOS auto control by H/W charger
 * circuit.
 */
#define RT5033_CHARGER_UUG_ENABLE		0x02

/* RT5033 charger High impedance mode */
#define RT5033_CHARGER_HZ_DISABLE		0x00
#define RT5033_CHARGER_HZ_ENABLE		0x01

/* RT5033 regulator BUCK output voltage uV */
#define RT5033_REGULATOR_BUCK_VOLTAGE_MIN		1000000U
#define RT5033_REGULATOR_BUCK_VOLTAGE_MAX		3000000U
#define RT5033_REGULATOR_BUCK_VOLTAGE_STEP		100000U
#define RT5033_REGULATOR_BUCK_VOLTAGE_STEP_NUM		32

/* RT5033 regulator LDO output voltage uV */
#define RT5033_REGULATOR_LDO_VOLTAGE_MIN		1200000U
#define RT5033_REGULATOR_LDO_VOLTAGE_MAX		3000000U
#define RT5033_REGULATOR_LDO_VOLTAGE_STEP		100000U
#define RT5033_REGULATOR_LDO_VOLTAGE_STEP_NUM		32

/* RT5033 regulator SAFE LDO output voltage uV */
#define RT5033_REGULATOR_SAFE_LDO_VOLTAGE		4900000U

enum rt5033_fuel_reg {
	RT5033_FUEL_REG_OCV_H		= 0x00,
	RT5033_FUEL_REG_OCV_L		= 0x01,
	RT5033_FUEL_REG_VBAT_H		= 0x02,
	RT5033_FUEL_REG_VBAT_L		= 0x03,
	RT5033_FUEL_REG_SOC_H		= 0x04,
	RT5033_FUEL_REG_SOC_L		= 0x05,
	RT5033_FUEL_REG_CTRL_H		= 0x06,
	RT5033_FUEL_REG_CTRL_L		= 0x07,
	RT5033_FUEL_REG_CRATE		= 0x08,
	RT5033_FUEL_REG_DEVICE_ID	= 0x09,
	RT5033_FUEL_REG_AVG_VOLT_H	= 0x0A,
	RT5033_FUEL_REG_AVG_VOLT_L	= 0x0B,
	RT5033_FUEL_REG_CONFIG_H	= 0x0C,
	RT5033_FUEL_REG_CONFIG_L	= 0x0D,
	/* Reserved 0x0E~0x0F */
	RT5033_FUEL_REG_IRQ_CTRL	= 0x10,
	RT5033_FUEL_REG_IRQ_FLAG	= 0x11,
	RT5033_FUEL_VMIN		= 0x12,
	RT5033_FUEL_SMIN		= 0x13,
	/* Reserved 0x14~0x1F */
	RT5033_FUEL_VGCOMP1		= 0x20,
	RT5033_FUEL_VGCOMP2		= 0x21,
	RT5033_FUEL_VGCOMP3		= 0x22,
	RT5033_FUEL_VGCOMP4		= 0x23,
	/* Reserved 0x24~0xFD */
	RT5033_FUEL_MFA_H		= 0xFE,
	RT5033_FUEL_MFA_L		= 0xFF,

	RT5033_FUEL_REG_END,
};

/* RT5033 fuel gauge battery present property */
#define RT5033_FUEL_BAT_PRESENT		0x02

/* RT5033 PMIC interrupts */
#define RT5033_PMIC_IRQ_BUCKOCP		BIT(2)
#define RT5033_PMIC_IRQ_BUCKLV		BIT(3)
#define RT5033_PMIC_IRQ_SAFELDOLV	BIT(4)
#define RT5033_PMIC_IRQ_LDOLV		BIT(5)
#define RT5033_PMIC_IRQ_OT		BIT(6)
#define RT5033_PMIC_IRQ_VDDA_UV		BIT(7)

#endif /* __RT5033_PRIVATE_H__ */

Filemanager

Name Type Size Permission Actions
abx500 Folder 0755
arizona Folder 0755
atc260x Folder 0755
da9052 Folder 0755
da9055 Folder 0755
da9062 Folder 0755
da9063 Folder 0755
da9150 Folder 0755
madera Folder 0755
mt6323 Folder 0755
mt6358 Folder 0755
mt6359 Folder 0755
mt6359p Folder 0755
mt6397 Folder 0755
pcf50633 Folder 0755
samsung Folder 0755
syscon Folder 0755
wcd934x Folder 0755
wm831x Folder 0755
wm8350 Folder 0755
wm8994 Folder 0755
88pm80x.h File 9.84 KB 0644
88pm860x.h File 13.19 KB 0644
aat2870.h File 3.92 KB 0644
abx500.h File 2.34 KB 0644
ac100.h File 5.98 KB 0644
adp5520.h File 8.31 KB 0644
altera-a10sr.h File 2.89 KB 0644
altera-sysmgr.h File 725 B 0644
as3711.h File 2.74 KB 0644
as3722.h File 14.53 KB 0644
asic3.h File 12.08 KB 0644
atmel-hlcdc.h File 2.04 KB 0644
axp20x.h File 16.7 KB 0644
bcm2835-pm.h File 235 B 0644
bcm590xx.h File 618 B 0644
bd9571mwv.h File 3.45 KB 0644
core.h File 4.65 KB 0644
cs42l43-regs.h File 45.72 KB 0644
cs42l43.h File 2.21 KB 0644
da8xx-cfgchip.h File 6.88 KB 0644
da903x.h File 7.05 KB 0644
davinci_voicecodec.h File 2.6 KB 0644
db8500-prcmu.h File 21.33 KB 0644
dbx500-prcmu.h File 13.87 KB 0644
dln2.h File 3.53 KB 0644
dm355evm_msp.h File 2.81 KB 0644
ds1wm.h File 817 B 0644
ezx-pcap.h File 7.75 KB 0644
gsc.h File 1.78 KB 0644
hi6421-pmic.h File 1.16 KB 0644
hi6421-spmi-pmic.h File 623 B 0644
hi655x-pmic.h File 1.89 KB 0644
htc-pasic3.h File 1.2 KB 0644
imx25-tsadc.h File 4.86 KB 0644
ingenic-tcu.h File 1.71 KB 0644
intel-m10-bmc.h File 4.79 KB 0644
intel_pmc_bxt.h File 1.51 KB 0644
intel_soc_pmic.h File 1.65 KB 0644
intel_soc_pmic_bxtwc.h File 1.6 KB 0644
intel_soc_pmic_mrfld.h File 2.23 KB 0644
ipaq-micro.h File 3.66 KB 0644
iqs62x.h File 2.73 KB 0644
janz.h File 846 B 0644
kempld.h File 4.03 KB 0644
khadas-mcu.h File 3.46 KB 0644
lm3533.h File 2.38 KB 0644
lochnagar.h File 1.59 KB 0644
lochnagar1_regs.h File 7.71 KB 0644
lochnagar2_regs.h File 15.19 KB 0644
lp3943.h File 2.54 KB 0644
lp873x.h File 8.29 KB 0644
lp87565.h File 7.41 KB 0644
lp8788-isink.h File 1.04 KB 0644
lp8788.h File 8.23 KB 0644
lpc_ich.h File 655 B 0644
max14577-private.h File 15.41 KB 0644
max14577.h File 2.23 KB 0644
max77620.h File 10.71 KB 0644
max77650.h File 1.84 KB 0644
max77686-private.h File 12.54 KB 0644
max77686.h File 1.99 KB 0644
max77693-common.h File 1.06 KB 0644
max77693-private.h File 17.29 KB 0644
max77693.h File 1.58 KB 0644
max77843-private.h File 15.22 KB 0644
max8907.h File 7.38 KB 0644
max8925.h File 7.04 KB 0644
max8997-private.h File 11.77 KB 0644
max8997.h File 5.38 KB 0644
max8998-private.h File 4.35 KB 0644
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mc13783.h File 2.69 KB 0644
mc13892.h File 792 B 0644
mc13xxx.h File 7.59 KB 0644
mcp.h File 1.61 KB 0644
menelaus.h File 1.25 KB 0644
motorola-cpcap.h File 12.35 KB 0644
mp2629.h File 422 B 0644
mxs-lradc.h File 5.6 KB 0644
ntxec.h File 907 B 0644
palmas.h File 148.81 KB 0644
qcom_rpm.h File 293 B 0644
rave-sp.h File 1.41 KB 0644
rc5t583.h File 9.28 KB 0644
rdc321x.h File 591 B 0644
retu.h File 723 B 0644
rk808.h File 19.42 KB 0644
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rohm-bd70528.h File 10.82 KB 0644
rohm-bd71815.h File 15.24 KB 0644
rohm-bd71828.h File 12.78 KB 0644
rohm-bd718x7.h File 8.83 KB 0644
rohm-bd957x.h File 4.26 KB 0644
rohm-generic.h File 2.99 KB 0644
rohm-shared.h File 631 B 0644
rt5033-private.h File 7.74 KB 0644
rt5033.h File 1.07 KB 0644
sc27xx-pmic.h File 228 B 0644
si476x-core.h File 14.84 KB 0644
si476x-platform.h File 6.04 KB 0644
si476x-reports.h File 4.49 KB 0644
sky81452.h File 354 B 0644
sta2x11-mfd.h File 18.13 KB 0644
stm32-lptimer.h File 1.91 KB 0644
stm32-timers.h File 5.46 KB 0644
stmfx.h File 3.96 KB 0644
stmpe.h File 3.99 KB 0644
stpmic1.h File 5.62 KB 0644
stw481x.h File 1.39 KB 0644
sun4i-gpadc.h File 3.48 KB 0644
syscon.h File 1.83 KB 0644
t7l66xb.h File 668 B 0644
tc3589x.h File 4.03 KB 0644
tc6387xb.h File 516 B 0644
tc6393xb.h File 1.37 KB 0644
ti-lmu-register.h File 5.53 KB 0644
ti-lmu.h File 1.81 KB 0644
ti_am335x_tscadc.h File 5.79 KB 0644
tmio.h File 3.78 KB 0644
tps6105x.h File 3.01 KB 0644
tps65010.h File 6.53 KB 0644
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viperboard.h File 2.74 KB 0644
wl1273-core.h File 7.7 KB 0644
wm8400-audio.h File 69.16 KB 0644
wm8400-private.h File 57.12 KB 0644
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